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Computing Units/Adders Add_LOA

Description:

Adders with and without ci, with and without co

Implementations:

There are: 8 implementations for this unit

Add_LOA

Version: v1

Reference paper:

  • Ardalan Najafi, Moritz Weissbrich, Guillermo Paya Vaya and Alberto Garcia-Ortiz A Fair Comparison of Adders in Stochastic Regime 2017 27th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) PDF Bibtex

                
    @INPROCEEDINGS{8106990, 
    author={A. {Najafi} and M. {Weissbrich} and G. {Paya-Vaya} and A. {Garcia-Ortiz}}, 
    booktitle={2017 27th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS)}, 
    title={A fair comparison of adders in stochastic regime}, 
    year={2017}, 
    volume={}, 
    number={}, 
    pages={1-6}, 
    keywords={adders;logic design;low-power electronics;stochastic processes;error tolerant adder type II;power-efficient systems;approximate circuits;stochastic techniques;approximate arithmetic units;arithmetic circuits;adders;Adders;Computer architecture;Stochastic processes;Generators;Delays}, 
    doi={10.1109/PATMOS.2017.8106990}, 
    ISSN={}, 
    month={Sep.},}
                

  • H. R. Mahdiani, A. Ahmadi, S. M. Fakhraie, C. Lucas Bio-Inspired Imprecise Computational Blocks for Efficient VLSI Implementation of Soft-Computing Applications IEEE Transactions on Circuits and Systems I: Regular Papers PDF Bibtex

                
    @ARTICLE{5371902, 
    author={H. R. {Mahdiani} and A. {Ahmadi} and S. M. {Fakhraie} and C. {Lucas}}, 
    journal={IEEE Transactions on Circuits and Systems I: Regular Papers}, 
    title={Bio-Inspired Imprecise Computational Blocks for Efficient VLSI Implementation of Soft-Computing Applications}, 
    year={2010}, 
    volume={57}, 
    number={4}, 
    pages={850-862}, 
    keywords={adders;digital arithmetic;fuzzy neural nets;VLSI;bio-inspired imprecise computational blocks;VLSI implementation;soft computing;digital hardware computational blocks;BIC adder;BIC multiplier;face recognition neural network;hardware defuzzification block;fuzzy processor;Very large scale integration;Costs;Neural networks;Uncertainty;Hardware;Face recognition;Fuzzy neural networks;Computer networks;Energy consumption;Network synthesis;Bio-inspired;face recognition;fuzzy processor;imprecise computational blocks;neural networks;very-large-scale integration}, 
    doi={10.1109/TCSI.2009.2027626}, 
    ISSN={1549-8328}, 
    month={April},}
                

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